An edition of Real Chip Design and Verification Using Verilog and VHDL

Real Chip Design and Verification Using Verilog and VHDL

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Cover of: Real Chip Design and Verification Using Verilog and VHDL by Ben Cohen
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Last edited by Open Library Bot
April 24, 2010 | History
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An edition of Real Chip Design and Verification Using Verilog and VHDL

Real Chip Design and Verification Using Verilog and VHDL

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Publish Date
Publisher
Vhdlcohen Pub
Language
English
Pages
390

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Subjects

Reference - General, Computers, Computer Books: Database
Edition Availability
Cover of: Real Chip Design and Verification Using Verilog and VHDL
Real Chip Design and Verification Using Verilog and VHDL
November 15, 2001, Vhdlcohen Pub
Paperback in English

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Book Details

The Physical Object

Format
Paperback
Number of pages
390

Edition Identifiers

Open Library
OL11774963M
ISBN 10
0970539428
ISBN 13
9780970539427
Goodreads
821714

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History

Download catalog record: RDF / JSON / OPDS | Wikipedia citation
April 24, 2010 Edited by Open Library Bot Fixed duplicate goodreads IDs.
April 16, 2010 Edited by bgimpertBot Added goodreads ID.
April 13, 2010 Edited by Open Library Bot Linked existing covers to the edition.
April 30, 2008 Created by an anonymous user Imported from amazon.com record