An edition of System-on-chip test architectures
(2007)
System-on-Chip Test Architectures (Systems on Silicon)
by Laung-Terng Wang, Charles E. Stroud, and Nur A. Touba
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Subjects
Very large scale integration, Testing, Design, Integrated circuits, Systems on a chip, Electrical engineering, Technology & Engineering, Computers - General Information, Science/Mathematics, Electricity, Logic Design, Computers & Internet, Technology / Engineering / Electrical, Engineering - Electrical & Electronic, Design, Integrated circuits, Systems on a chip, Testing, Very large scale integration, Integrated circuits, very large scale integration| Edition | Availability |
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1
System-On-Chip Test Architectures: Nanometer Design for Testability
2010, Elsevier Science & Technology Books
in English
0080556809 9780080556802
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2
System-on-chip test architectures: nanometer design for testability
2008, Morgan Kaufmann Publishers
in English
012373973X 9780123739735
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3
System-on-Chip Test Architectures (Systems on Silicon)
November 16, 2007, Morgan Kaufmann
Hardcover
in English
012373973X 9780123739735
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- Created April 30, 2008
- 10 revisions
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| January 1, 2023 | Edited by MARC Bot | import existing book |
| December 17, 2020 | Edited by MARC Bot | import existing book |
| October 9, 2020 | Edited by ImportBot | import existing book |
| August 1, 2020 | Edited by ImportBot | import existing book |
| April 30, 2008 | Created by an anonymous user | Imported from amazon.com record |