Arithmetic built-in self-test for embedded systems
by Janusz Rajski
Arithmetic Built-In Self-Test for Embedded Systems offers a thorough treatment of the important issues in software-based built-in self-test for systems with embedded processors. Fundamental concepts are illustrated with practical scenarios for test generation, test application, and test response compaction.
Arithmetic Built-In Self-Test for Embedded Systems uses an approach to cutting-edge technology that will be of interest to hardware and embedded system designers, test and design engineers, and researchers working on IC/core testing. It is also appropriate for graduate-level design courses. An introductory chapter provides a comprehensive tutorial covering the most relevant DFT and BIST techniques.
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Arithmetic built-in self-test for embedded systems
1998, Prentice Hall PTR
in English
0137564384 9780137564385
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Includes bibliographical references (p. [249]-263) and index.
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