An edition of Analysis and Design of CMOS Clocking Circuits for Low Phase Noise
(2020)
Analysis and Design of CMOS Clocking Circuits for Low Phase Noise
by Woorham Bae and Deog-Kyoon Jeong
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Complementary Metal oxide semiconductors, Textbooks, Design and construction, Digital integrated circuits, Clocks, CMOS integrated circuits, Delay lock loops, Digital phase locked loops, Hardware description languages, Injection locked oscillators, Integrated circuit design, Integrated circuit modelling, Integrated circuit noise, Interference suppression, Jitter, Multiplying circuits, Network analysis, Phase noise, Voltage-controlled oscillators| Edition | Availability |
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Analysis and Design of CMOS Clocking Circuits for Low Phase Noise
2020, Institution of Engineering & Technology, The Institution of Engineering and Technology
in English
1785618016 9781785618017
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Analysis and Design of CMOS Clocking Circuits for Low Phase Noise
2020, Institution of Engineering & Technology
in English
1785618024 9781785618024
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- Created May 17, 2020
- 3 revisions
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| April 14, 2023 | Edited by ImportBot | import existing book |
| December 15, 2022 | Edited by MARC Bot | import existing book |
| May 17, 2020 | Created by Mek | Imported from Better World Books record |