An area-efficient redundancy scheme for the fault-tolerant design of large area VLSI processor arrays.

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An area-efficient redundancy scheme for the f ...
Derek Bruce Ivan Feltham
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Last edited by WorkBot
December 15, 2009 | History

An area-efficient redundancy scheme for the fault-tolerant design of large area VLSI processor arrays.

  • 0 Ratings
  • 0 Want to read
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  • 0 Have read

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Publish Date
Language
English
Pages
100

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Book Details


The Physical Object

Pagination
100 leaves
Number of pages
100

ID Numbers

Open Library
OL18436742M

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Download catalog record: RDF / JSON / OPDS | Wikipedia citation
December 15, 2009 Edited by WorkBot link works
October 16, 2008 Created by ImportBot Imported from University of Toronto MARC record