An edition of Designing logic systems using state machines (1973)

Designing logic systems using state machines

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Cover of: Designing logic systems using state machines by Christopher R. Clare
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An edition of Designing logic systems using state machines (1973)

Designing logic systems using state machines

by

  • 0 Ratings
  • 3 Want to read
  • 0 Currently reading
  • 0 Have read

Describes the fundamentals of state-machine design with an emphasis on using state machines to stress the importance of modular design, as well as for determining behavior and implementing the design.

Publish Date
Publisher
McGraw-Hill
Language
English
Pages
116

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Subjects
Design and construction, Digital electronics, Electronic digital computers

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Cover of: Designing logic systems using state machines
Designing logic systems using state machines
1973, McGraw-Hill
in English
  • Not in Library
Libraries near you: WorldCat

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Book Details

First Sentence

"Deciding where to begin must plague every person who decides to describe anything, and this author for one is no different."

Table of Contents

I. Introductory Concepts Page 1
1.0. Where to Begin Page 1
1.1. Basic Design Concepts in Logic Page 1
1.2. Functional Paretitioning Page 1
1.3. Describing a Task with an Algorithm Page 2
II. The Module Definition Page 7
2.0. The Definition Phase Page 7
2.1. The State Machine Page 7
2.2. Terminal Definition Page 8
2.3. A Sample Definition Page 9
2.4. Definition Documentation Page 11
III. Machine Class Descriptions Page 13
3.0. The Description Phase Page 13
3.1. The Three Classic Description Languages of Logic Page 13
Logic and Boolean Expressions Page 13
Tabular Descriptions Page 14
The Karnaugh Map Description Page 14
3.2. The ASM Chart Description of Logic Page 16
3.3. Machine Classes Page 20
3.4. Class 0 - Combinatorial Logic Page 20
3.5. Class 1 - Delay Machines Page 22
3.6. Class 2 - Direct State Transition and State Output Page 26
3.7. Class 3 - Conditional State Transition and State Output Page 29
3.8. Class 4 - Conditional State Transition and Conditional State Output Page 30
3.9. Summary of Machine Classes Page 33
IV. Synthesis for Gate-Oriented Design Page 35
4.0. The Fourth Phase Page 35
4.1. Symbolic Logic Circuits Page 35
4.2. The Synthesis Process Page 36
4.3. Equation-To-Gate Conversions Page 39
4.4. Using Maps to Simplify Boolean Functions Page 39
Map Subcubes and Reading Maps Page 39
Reducing the Required Map Size with Map-Entered Variables Page 41
A Map-Reading Algorithm Page 42
4.5. Output Function Synthesis Page 43
4.6. Multi-Output Simplifications Page 43
4.7. Next State Function Synthesis Page 44
Snthesizing Flip-Flops (Unclocked State Machines) Page 44
Use of the Excitation Table for Flip-Flop Inputs Page 50
4.8. State Assignment Page 55
Minimum State Locus Page 56
Reduced Dependency Page 57
Transition Races Page 59
State Assignment Simplifictions Page 64
4.9. Hazards Page 65
4.10. Simple Implementation Page 66
V. Synthesis for ROM-Centered Deisgn Page 75
5.0. The Read Only Memory Page 75
5.1. A ROM Structure as Combinatorial Logic Page 75
5.2. Sequential Logic in ROMs Page 76
Link-Path Addressable Page 77
State-Qualifier Pair Addresses Page 80
Assumed Addresses Page 80
Variable Format Addressable Page 80
5.3. Information Storage Reduction Page 84
Coding Efficiency Page 84
Bit Packing Page 86
Function Extraction Page 87
Changeability and Compaction Page 87
5.4. Comparative Implementations Page 87
VI. Linked State Machines Page 97
6.0. Linked State Machines Page 97
6.1. Interface Linking Page 97
6.2. Iteratively Linked Machines Page 98
Adders Page 98
Ripple Counters Page 100
Shift Registers Page 101
6.3. Interpretively Linked Machines Page 101
Levels and Total State Page 101
Interpreted Outputs Page 103
Computer Structures Page 105
6.4. Software Linked Machines Page 107
6.5. Conclusion Page 107
VII. Introduction to Peformance Evaluation Page 109
7.0. Performance Evaluation Page 109
7.1. Simulation Page 109
7.2. Test Page 111
7.3. Design for Test Page 113
Index Page 115

Edition Notes

Includes bibliographies.

Published in
New York

Classifications

Dewey Decimal Class
621.3819/58/2
Library of Congress
TK7888.3 .C6

The Physical Object

Pagination
116 p.
Number of pages
116

ID Numbers

Open Library
OL5455920M
ISBN 10
0070111200
LCCN
73158186
Library Thing
3959061
Goodreads
4332335

Source records

Library of Congress MARC record
amazon.com record
Promise Item

Work Description

This is a very good book I read in the past. I hope to read it again and wish a pdf to read it since my eyesight is too weak to read paper copy.

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History

Download catalog record: RDF / JSON
April 9, 2023 Edited by ImportBot import existing book
October 5, 2018 Edited by yannis antsos Edited without comment.
December 5, 2010 Edited by Open Library Bot Added subjects from MARC records.
December 10, 2009 Created by WorkBot add works page