An edition of Step-by-step functional verification with SystemVerilog and OVM (2008)

Step-by-step functional verification with SystemVerilog and OVM

by

Cover of: Step-by-step functional verification with SystemVerilog and OVM by Sasan Iman, Sasan Iman
Locate

My Reading Lists:

Create a new list

Notes
Notes

Check nearby libraries

Buy this book

Last edited by MARC Bot
July 7, 2019 | History
Edit
An edition of Step-by-step functional verification with SystemVerilog and OVM (2008)

Step-by-step functional verification with SystemVerilog and OVM

by

This work doesn't have a description yet. Can you add one?

Publish Date
Publisher
Hansen Brown Publishing
Language
English
Pages
500

Check nearby libraries

Buy this book

Subjects

Verilog (Computer hardware description language), Integrated circuits, Verification
Edition Availability
Cover of: Step-by-step functional verification with SystemVerilog and OVM
Step-by-step functional verification with SystemVerilog and OVM
2008, Hansen Brown Publishing
in English

Add another edition?

Book Details

Edition Notes

Includes index.

Published in
San Francisco, CA
Other Titles
Step-by-step functional verification with SystemVerilog and Open Verification Methodology

The Physical Object

Pagination
xxii, 500 p.
Number of pages
500

Edition Identifiers

Open Library
OL27089300M
ISBN 10
0981656218
ISBN 13
9780981656212
OCLC/WorldCat
256214698

Work Identifiers

Work ID
OL19904025W

Source records

Internet Archive item record
ISBNdb

Community Reviews (0)

No community reviews have been submitted for this work.

Lists

Loading indicator
Loading carousel
Loading indicator
Loading carousel

History

Download catalog record: RDF / JSON
July 7, 2019 Created by MARC Bot import new book