An edition of Digital control and interfacing for a high speed satellite communications signal processor
(1980)
Digital control and interfacing for a high speed satellite communications signal processor
by John Everett Ohlson
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A digital interface has been designed and constructed as part of the Naval Postgraduate School Satellite Signal Analyzer System. This interface enables a Floating Point System, AP-120B, Array Processor to perform Direct Memory Access transfers with the Data Acquisition Unit.
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Digital control and interfacing for a high speed satellite communications signal processor
1980, Naval Postgraduate School
in English
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Book Details
Edition Notes
"NPS62-80-003PR"--Cover.
"Project report."
"January 1980"--Cover.
Title from cover.
"Prepared for: Naval Electronic Systems Command, PME-106-1, Washington, D.C. 20360."
Includes bibliographical references (p. 104).
"Approved for public release; distribution is unlimited"--Cover.
Technical report; 1980.
ck/ 6/10/09.
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