Stresses in solder joints of electronic packages

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July 26, 2014 | History

Stresses in solder joints of electronic packages

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Electronic chip packages are comprised of several components with different material properties and geometries. One of the most basic electronic packages is the tri-assembly system consisting of a chip attached to a board by a solder connection. During the fabrication of this simple unit, the soldering process subjects the device to a thermal field. Since the three components of the device have different material properties, in particular their Young's modulii, Poissons ratios, and thermal coefficients of expansion, the mismatch in these properties result in thermoelastic stresses. In addition to the thermal field arising from fabrication, thermal fields and hence thermoelastic stresses, result from the operation of the device itself. An investigation of stresses was undertaken. Two types of solder joints, a leaded device and an unleaded device, were compared for effectiveness. Procedures are shown for the analyses of these two types of solder joints. The analyses showed that the thermoelastic stresses for the stiff unleaded connection are significantly greater, by a factor of 20 for the particular arrangement studied in this report, than the stresses in the more flexible leaded connection.

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Cover of: Stresses in solder joints of electronic packages
Stresses in solder joints of electronic packages
1991, Naval Postgraduate School, Available from National Technical Information Service
in English

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Book Details


Edition Notes

Cover title.

"NPS-ME-92-001."

"December 1991."

AD A245 799.

Includes bibliographical references (p. 21).

aq/ /aq cc:9116 10/28/97

Published in
Monterey, Calif, Springfield, Va
Other Titles
NPS-ME-92-001.

The Physical Object

Pagination
21 p. :
Number of pages
21

ID Numbers

Open Library
OL25507183M
Internet Archive
stressesinsolder00sali

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Internet Archive item record

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