Hardware acceleration of EDA algorithms

custom ICs, FPGAs and GPUs

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Hardware acceleration of EDA algorithms by Kanupriya Gulati, Kanupriya Gulati
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Last edited by ImportBot
August 2, 2020 | History

Hardware acceleration of EDA algorithms

custom ICs, FPGAs and GPUs

  • 1 Want to read

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Publish Date
Publisher
Springer
Language
English
Pages
192
Edition Availability
Cover of: Hardware Acceleration of EDA Algorithms
Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs
Sep 05, 2014, Springer
paperback
Cover of: Hardware Acceleration of EDA Algorithms
Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs
Mar 02, 2011, Springer
paperback
Cover of: Hardware acceleration of EDA algorithms
Hardware acceleration of EDA algorithms: custom ICs, FPGAs and GPUs
2010, Springer
in English

Add another edition?

Book Details


Table of Contents

Hardware Platforms
GPU Architecture and the CUDA Programming Model
Accelerating Boolean Satisfiability on a Custom IC
Accelerating Boolean Satisfiability on an FPGA
Accelerating Boolean Satisfiability on a Graphics Processing Unit
Accelerating Statistical Static Timing Analysis Using Graphics Processors
Accelerating Fault Simulation Using Graphics Processors
Fault Table Generation Using Graphics Processors
Accelerating Circuit Simulation Using Graphics Processors
Automated Approach for Graphics Processor Based Software Acceleration

Edition Notes

Includes bibliographical references and index.

Published in
New York

Classifications

Dewey Decimal Class
621.3815
Library of Congress
TK7867 .G85 2010, TK7888.4TA345-345.5, TK7867-7867.5

The Physical Object

Pagination
xxii, 192 p. :
Number of pages
192

Edition Identifiers

Open Library
OL25296735M
ISBN 10
1441909435, 1441909443
ISBN 13
9781441909435, 9781441909442
LCCN
2010920238
OCLC/WorldCat
499067154

Work Identifiers

Work ID
OL16615336W

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