Low-power design of nanometer FPGAs

architecture and EDA

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Last edited by ImportBot
August 2, 2020 | History

Low-power design of nanometer FPGAs

architecture and EDA

  • 0 Ratings
  • 1 Want to read
  • 0 Currently reading
  • 0 Have read

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Publish Date
Publisher
Morgan Kaufmann
Language
English
Pages
241

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Previews available in: English

Edition Availability
Cover of: Low-power design of nanometer FPGAs
Low-power design of nanometer FPGAs: architecture and EDA
2010, Morgan Kaufmann
in English

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Book Details


Table of Contents

FPGA overview : architecture and CAD
Power dissipation in modern FPGAs
Power estimation in FPGAs
Dynamic power reduction techniques in FPGAs
Leakage power reduction in FPGAs using MTCMOS techniques
Leakage power reduction in FPGAs through input pin reordering.

Edition Notes

Includes bibliographical references (p. 221-235) and index.

Published in
Burlington, MA
Series
Systems on silicon

Classifications

Library of Congress
TK7895.G36 H37 2010, TK7895.G36

The Physical Object

Pagination
xiv, 241 p. :
Number of pages
241

ID Numbers

Open Library
OL25052674M
Internet Archive
lowpowerdesignna00hass
ISBN 10
0123744385
ISBN 13
9780123744388
LCCN
2010484132
OCLC/WorldCat
184827815, 794665984

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History

Download catalog record: RDF / JSON
August 2, 2020 Edited by ImportBot import existing book
October 23, 2011 Created by LC Bot import new book