The microarchitecture of FPGA-based soft processors.

The microarchitecture of FPGA-based soft proc ...
Peter Yiannacouras, Peter Yian ...
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Last edited by WorkBot
January 24, 2010 | History

The microarchitecture of FPGA-based soft processors.

As more embedded systems are built using FPGA platforms, there is an increasing need to support processors in FPGAs. One option is the soft processor, a processor implemented in the reconfigurable logic of the FPGA. Commercial soft processors have been widely deployed, and hence we are motivated to understand their microarchitecture. We must re-evaluate microarchitecture in the soft processor context because an FPGA platform is significantly different than an ASIC platform. This dissertation presents an infrastructure for rapidly generating RTL models of soft processors, as well as a methodology for measuring their area, performance, and power. Using the automatically-generated soft processors we explore many interesting microarchitectural axes in the trade-off space. We also compare our designs to Altera's Nios II commercial soft processors and find that our automatically generated designs span the design space while remaining very competitive.

Publish Date
Language
English
Pages
147

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Book Details


Edition Notes

Source: Masters Abstracts International, Volume: 44-02, page: 1009.

Thesis (M.A.Sc.)--University of Toronto, 2005.

Electronic version licensed for access by U. of T. users.

GERSTEIN MICROTEXT copy on microfiche (2 microfiches).

The Physical Object

Pagination
147 leaves.
Number of pages
147

Edition Identifiers

Open Library
OL19217001M
ISBN 10
0494072865

Work Identifiers

Work ID
OL12683576W

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January 24, 2010 Edited by WorkBot add more information to works
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