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January 24, 2010 | History

Managing circuit don't cares in Boolean satisfiability 1 edition

Managing circuit don't cares in Boolean satisfiability
Sean A. Safarpour

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Managing circuit don't cares in Boolean satisfiability.

Published 2005 .
Written in English.

About the Book

Boolean Satisfiability solvers are widely used in many VLSI Computer Aided Design applications. Their popularity is due to recent developments such as effective search space pruning, decision making, and learning from previous mistakes. Most SAT algorithms and performance improvement techniques focus on the core engine and do not exploit circuit specific properties. Historically, properties such as don't care conditions have played an important role in problems such as test pattern generation and circuit synthesis. This thesis presents a number of techniques that increase SAT solver performance by taking advantage of circuit don't care conditions. General strategies and specific heuristics are developed that utilize a circuit's observability don't cares; controllability don't cares, and don't care states to improve SAT solver efficiency for formal verification problems. Extensive experiments demonstrate the benefits of don't care conditions on benchmark suites as well as industrial circuits.

Edition Notes

Source: Masters Abstracts International, Volume: 44-02, page: 1004.

Thesis (M.A.Sc.)--University of Toronto, 2005.

Electronic version licensed for access by U. of T. users.

GERSTEIN MICROTEXT copy on microfiche (2 microfiches).

The Physical Object

98 leaves.
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History Created December 11, 2009 · 2 revisions Download catalog record: RDF / JSON

January 24, 2010 Edited by WorkBot add more information to works
December 11, 2009 Created by WorkBot add works page