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January 24, 2010 | History

Exploring spatial locality in VLSI on-chip power grids 1 edition

Exploring spatial locality in VLSI on-chip power grids
Tsz Shuen Chan

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Exploring spatial locality in VLSI on-chip power grids.

Published 2005 .
Written in English.

About the Book

Full-chip power grid analysis is expensive, time consuming, and not flexible. In this work, the spatial locality property of a power grid has been studied in the hope of developing a new partitioning scheme to achieve efficient analysis and verification. After examining its behaviour, a simple way of describing locality has been proposed. In addition, a novel analytical formulation has been presented to solve for the voltage response and determine the neighbourhood of a current source on a regular, periodic grid. Unfortunately, this method requires manual manipulations of equations and hence not suitable for CAD development. Finally, a simulator that makes use of locality has also been outlined. Based on the linearity of the grid model and applying superposition, this simulator determines the voltage solution by summing the response of each individual current source. This approach can handle very large power grids and efficiently simplifies the grid refinement process.

Edition Notes

Source: Masters Abstracts International, Volume: 44-02, page: 0985.

Thesis (M.A.Sc.)--University of Toronto, 2005.

Electronic version licensed for access by U. of T. users.

GERSTEIN MICROTEXT copy on microfiche (1 microfiche).

The Physical Object

79 leaves.
Number of pages

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