An edition of SystemVerilog for design
(2003)
SystemVerilog for design
a guide to using SystemVerilog for hardware design and modeling
by Sutherland, Stuart., Stuart Sutherland, Simon Davidmann, and Peter Flake
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Subjects
Computer simulation, Design and construction, Electronic digital computers, Verilog (Computer hardware description language), Computer Hardware & Operating Systems, Electronics engineering, Systems analysis & design, Engineering - Electrical & Electronic, Computer Books: Languages, Computers, Technology & Industrial Arts, Programming - Systems Analysis & Design, CAD-CAM - General, Electronics - Circuits - General, Technology / Electronics / Circuits / General, Programming Languages - GeneralShowing 2 featured editions. View all 2 editions?
| Edition | Availability |
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1
SystemVerilog for design: a guide to using SystemVerilog for hardware design and modeling
2004, Kluwer
in English
1402075308 9781402075308
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2
SystemVerilog For Design: A Guide to Using SystemVerilog for Hardware Design and Modeling
June 30, 2003, Springer
Hardcover
in English
- 1 edition
1402075308 9781402075308
|
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Book Details
Edition Notes
Includes bibliographical references and index.
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History
- Created April 1, 2008
- 5 revisions
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| December 20, 2023 | Edited by ImportBot | import existing book |
| December 8, 2020 | Edited by MARC Bot | import existing book |
| April 13, 2010 | Edited by Open Library Bot | Linked existing covers to the edition. |
| December 12, 2009 | Edited by WorkBot | link works |
| April 1, 2008 | Created by an anonymous user | Imported from Scriblio MARC record |