| Record ID | marc_records_scriblio_net/part17.dat:194966055:916 |
| Source | Scriblio |
| Download Link | /show-records/marc_records_scriblio_net/part17.dat:194966055:916?format=raw |
LEADER: 00916pam 2200253 a 4500
001 85000078
003 DLC
005 19850514000000.0
008 850116s1985 maua b 00110 eng
010 $a 85000078
020 $a0262111039
050 0 $aQA76.9.A73$bK37 1985
082 0 $a621.3819/5835$219
100 10 $aKatevenis, Manolis G. H.
245 10 $aReduced instruction set computer architectures for VLSI /$cManolis G.H. Katevenis.
260 0 $aCambridge, Mass. :$bMIT Press,$cc1985.
300 $a215 p. :$bill. ;$c24 cm.
490 1 $aACM doctoral dissertation awards ;$v1984
500 $aOriginally presented as author's thesis (Ph. D.)--University of California, Berkeley, 1983.
504 $aBibliography: p. [201]-207.
500 $aIncludes index.
650 0 $aComputer architecture.
650 0 $aIntegrated circuits$xVery large scale integration.
830 0 $aACM doctoral dissertation award ;$v1984.