| Record ID | marc_records_scriblio_net/part14.dat:233566596:1064 |
| Source | Scriblio |
| Download Link | /show-records/marc_records_scriblio_net/part14.dat:233566596:1064?format=raw |
LEADER: 01064cam 2200277 a 4500
001 2003535257
003 DLC
005 20040622194945.0
008 030416s2003 njua b 001 0 eng
010 $a 2003535257
035 $a(OCoLC)ocm51933611
040 $aIMJ$cIMJ$dDLC
042 $alccopycat
020 $a0471447277
050 00 $aTK7872.P38$bP48 2003
082 00 $a621.3815/364$221
245 00 $aPhase-locking in high-performance systems :$bfrom devices to architectures /$cedited by Behzad Razavi.
260 $aPiscataway, New Jersey :$bIEEE ;$aHoboken, New Jersey :$bWiley-Interscience,$c2003.
300 $axiii, 716 p. :$bill. ;$c29 cm.
500 $a"A selected reprint volume."
504 $aIncludes bibliographical references and index.
650 0 $aPhase-locked loops.
650 0 $aHigh performance computing.
700 1 $aRazavi, Behzad.
856 42 $3Contributor biographical information$uhttp://www.loc.gov/catdir/bios/wiley046/2003535257.html
856 42 $3Publisher description$uhttp://www.loc.gov/catdir/description/wiley039/2003535257.html