| Record ID | marc_loc_updates/v38.i04.records.utf8:5050031:1207 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_updates/v38.i04.records.utf8:5050031:1207?format=raw |
LEADER: 01207cam a22003014a 4500
001 2005047885
003 DLC
005 20100121084338.0
008 050415s2005 nyua b 001 0 eng
010 $a 2005047885
016 7 $a013105631$2Uk
020 $a0071453717 (alk. paper)
035 $a(OCoLC)ocm57638748
040 $aDLC$cDLC$dYDX$dUKM$dMIA$dOCL$dDLC
042 $apcc
050 00 $aTK7872.P38$bB53 2005
082 00 $a621.3815/364$222
100 1 $aBianchi, Giovanni,$d1963-
245 10 $aPhase-locked loop synthesizer simulation /$cGiovanni Bianchi.
260 $aNew York :$bMcGraw-Hill,$cc2005.
300 $aviii, 227 p. :$bill. ;$c24 cm. +$e1 CD-ROM (4 3/4 in.).
440 0 $aMcGraw-Hill electronic engineering series
504 $aIncludes bibliographical references and index.
650 0 $aPhase-locked loops$xComputer simulation.
650 0 $aFrequency synthesizers.
856 42 $3Contributor biographical information$uhttp://www.loc.gov/catdir/enhancements/fy0624/2005047885-b.html
856 42 $3Publisher description$uhttp://www.loc.gov/catdir/enhancements/fy0624/2005047885-d.html
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/enhancements/fy0624/2005047885-t.html