| Record ID | marc_loc_updates/v37.i46.records.utf8:7722983:814 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_updates/v37.i46.records.utf8:7722983:814?format=raw |
LEADER: 00814nam a22002538a 4500
001 2009044515
003 DLC
005 20091112120126.0
008 091112s2010 nju b 001 0 eng
010 $a 2009044515
020 $a9780136019282 (alk. paper)
020 $a0130891614 (alk. paper)
040 $aDLC$cDLC
050 00 $aTK7885.7$b.C5485 2010
082 00 $a621.39/5$222
100 1 $aCiletti, Michael D.
245 10 $aAdvanced digital design with the Verilog HDL /$cMichael D. Ciletti.
260 $aUpper Saddle River, N.J. :$bPearson Education,$cc2010.
263 $a1002
300 $ap. cm.
490 0 $aPrentice Hall XILINX design series
504 $aIncludes bibliographical references and index.
650 0 $aLogic design$xData processing.
650 0 $aVerilog (Computer hardware description language)