| Record ID | marc_loc_updates/v37.i46.records.utf8:4448619:1675 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_updates/v37.i46.records.utf8:4448619:1675?format=raw |
LEADER: 01675cam a2200385 a 4500
001 2008001634
003 DLC
005 20091113153938.0
008 080114s2009 nyua 001 0 eng
010 $a 2008001634
015 $aGBA819508$2bnb
016 7 $a014524283$2Uk
020 $a9780073529530 (hbk. : alk. paper)
020 $a0073529532 (hbk. : alk. paper)
020 $a9780071287654 (pbk.)
020 $a0071287655 (pbk.)
035 $a(OCoLC)191024028$z(OCoLC)191811187
035 $a(OCoLC)ocn191024028
040 $aDLC$cDLC$dUKM$dBTCTA$dYDXCP$dBAKER$dBWX$dCOD$dIXA$dDLC
050 00 $aTK7888.4$b.B76 2008
082 00 $a621.39/5$222
100 1 $aBrown, Stephen D.
245 10 $aFundamentals of digital logic with VHDL design /$cStephen Brown and Zvonko Vranesic.
250 $a3rd ed.
260 $aNew York, NY :$bMcGraw-Hill,$cc2009.
300 $axx, 939 p. :$bill. (some col.) ;$c24 cm. +$e1 CD-ROM (4 3/4 in.)
440 0 $aMcGraw-Hill series in electrical and computer engineering
500 $aIncludes index.
538 $aMinimum system requirements (PC): Pentium III processor or later; Windows XP or later; USB port for connecting a USB-Blaster; TCP/IP networking protocol installed; Internet Explorer 6.0 or later.
500 $aAccompanying CD-ROM contains Altera's Quartus II CAD system and all VHDL examples presented in the book.
650 0 $aLogic circuits$xDesign and construction$xData processing.
650 0 $aLogic design$xData processing.
650 0 $aVHDL (Computer hardware description language)
700 1 $aVranesic, Zvonko G.
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/toc/ecip088/2008001634.html