| Record ID | marc_loc_2016/BooksAll.2016.part34.utf8:156690532:1023 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_2016/BooksAll.2016.part34.utf8:156690532:1023?format=raw |
LEADER: 01023cam a2200301 a 4500
001 2007044293
003 DLC
005 20090829092730.0
008 071024s2008 flua b 001 0 eng
010 $a 2007044293
015 $aGBA781905$2bnb
016 7 $a014057463$2Uk
020 $a9781420060942 (alk. paper)
020 $a1420060945 (alk. paper)
035 $a(OCoLC)ocn144226528
035 $a(OCoLC)144226528
040 $aDLC$cDLC$dUKM$dBTCTA$dBAKER$dYDXCP$dC#P$dDLC
050 00 $aTK7872.L64$bY36 2008
082 00 $a621.39/5$222
100 1 $aYanushkevich, Svetlana N.
245 10 $aIntroduction to logic design /$cSvetlana N. Yanushkevich, Vlad P. Shmerko.
260 $aBoca Raton :$bCRC Press,$cc2008.
300 $axxii, 692 p. :$bill. ;$c25 cm.
504 $aIncludes bibliographical references and index.
650 0 $aLogic devices$xDesign and construction.
650 0 $aLogic design.
700 1 $aShmerko, Vlad P.
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/toc/ecip083/2007044293.html