| Record ID | marc_loc_2016/BooksAll.2016.part32.utf8:158605548:1142 |
| Source | Library of Congress |
| Download Link | /show-records/marc_loc_2016/BooksAll.2016.part32.utf8:158605548:1142?format=raw |
LEADER: 01142cam a22003494a 4500
001 2005033982
003 DLC
005 20100929081754.0
008 051123s2006 maua 001 0 eng
010 $a 2005033982
015 $aGBA592124$2bnb
016 7 $a013325882$2Uk
020 $a007286611X (hard copy : alk. paper)
020 $a0071106693 (hbk.)
020 $a9780072866117
020 $a9780071106696
035 $a(OCoLC)ocm62225026
040 $aDLC$cDLC$dUKM$dBAKER$dSISPL$dDLC
042 $apcc
050 00 $aTK454$b.H4 2006
082 00 $a621.319/2$222
100 1 $aHayt, William Hart,$d1920-
245 10 $aEngineering circuit analysis /$cWilliam H. Hayt, Jr., Jack E. Kemmerly, Steven M. Durbin.
250 $a7th ed.
260 $aBoston :$bMcGraw-Hill Higher Education,$c2006.
300 $axxiii, 856 p. :$bill. ;$c26 cm.
500 $aIncludes index.
650 0 $aElectric circuit analysis.
650 0 $aElectric network analysis.
700 1 $aKemmerly, Jack E.$q(Jack Ellsworth),$d1924-
700 1 $aDurbin, Steven M.
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/toc/ecip064/2005033982.html