Record ID | marc_loc_2016/BooksAll.2016.part01.utf8:34330374:1074 |
Source | Library of Congress |
Download Link | /show-records/marc_loc_2016/BooksAll.2016.part01.utf8:34330374:1074?format=raw |
LEADER: 01074cam a22002774a 4500
001 00051457
003 DLC
005 20080311080950.0
008 001017s2001 maua b 001 0 eng
010 $a 00051457
020 $a079237262X (alk. paper)
040 $aDLC$cDLC$dDLC
042 $apcc
050 00 $aTK7895.E42$bH75 2001
082 00 $a004.16$221
100 1 $aHsieh, Harry,$d1967-
245 10 $aSynchronous equivalence :$bformal methods for embedded systems /$cHarry Hsieh, Felice Balarin, Alberto Sangiovanni-Vincentelli.
260 $aBoston :$bKluwer Academic Publishers,$c2001.
300 $ax, 136 p. :$bill. ;$c25 cm.
504 $aIncludes bibliographical references (p. [133]-136 and index.
650 0 $aEmbedded computer systems.
650 0 $aFormal methods (Computer science)
700 1 $aBalarin, Felice.
700 1 $aSangiovanni-Vincentelli, Alberto.
856 42 $3Publisher description$uhttp://www.loc.gov/catdir/enhancements/fy0820/00051457-d.html
856 41 $3Table of contents only$uhttp://www.loc.gov/catdir/enhancements/fy0820/00051457-t.html