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MARC Record from marc_columbia

Record ID marc_columbia/Columbia-extract-20221130-030.mrc:73015072:3614
Source marc_columbia
Download Link /show-records/marc_columbia/Columbia-extract-20221130-030.mrc:73015072:3614?format=raw

LEADER: 03614cam a2200625Mu 4500
001 14697767
005 20220627130901.0
006 m o d
007 cr |n|||||||||
008 150509s2008 xx ob 001 0 eng d
035 $a(OCoLC)ocn908077774
035 $a(NNC)14697767
040 $aEBLCP$beng$epn$cEBLCP$dOCLCQ$dYDXCP$dOCLCQ$dNLE$dOCLCO$dOCLCQ$dOCLCO$dN$T$dOCLCF$dUKMGB$dOTZ$dYDX$dTYFRS$dAU@$dOCLCQ$dUKAHL$dOCLCQ$dK6U$dOCLCO
015 $aGBB7B1142$2bnb
016 7 $a018394060$2Uk
019 $a1080588609$a1100420317
020 $a9781420060959$q(electronic bk.)
020 $a1420060953$q(electronic bk.)
020 $a9780429138249$q(electronic bk.)
020 $a0429138245$q(electronic bk.)
020 $z9781420060942
020 $z1420060945
024 7 $a10.1201/9781420060959$2doi
035 $a(OCoLC)908077774$z(OCoLC)1080588609$z(OCoLC)1100420317
037 $aTANDF_189029$bIngram Content Group
050 4 $aTK7868.L6 M355 2015
072 7 $aTEC$x009070$2bisacsh
072 7 $aTJFC$2bicscc
082 04 $a621.39/5$a621.395
084 $aST 195$2rvk
084 $aZN 5600$2rvk
049 $aZCUA
100 1 $aYanushkevich, Svetlana N.
245 10 $aIntroduction to Logic Design.
260 $aHoboken :$bCRC Press,$c2008.
300 $a1 online resource (710 pages)
336 $atext$btxt$2rdacontent
337 $acomputer$bc$2rdamedia
338 $aonline resource$bcr$2rdacarrier
588 0 $aPrint version record.
505 0 $aFront cover; Dedication; Contents; Preface; Chapter 1. Design Process and Technology; Chapter 2. Number Systems; Chapter 3. Graphical Data Structures; Chapter 4. Algebra I: Boolean; Chapter 5. Fundamental Expansions; Chapter 6. Boolean Data Structures; Chapter 7. Properties of Boolean Functions (Optional); Chapter 8. Optimization I: Algebraic and K-maps; Chapter 9. Optimization II: Decision Diagrams; Chapter 10. Algebra II: Polynomial; Chapter 11. Manipulation of Polynomial Expressions; Chapter 12. Decision Diagrams for Polynomial Forms (Optional).
505 8 $aChapter 13. Standard Modules of Combinational NetworksChapter 14. Combinational Logic Network Design; Chapter 15. Standard Modules of Sequential Logic Networks; Chapter 16. Memory and Programmable Devices; Chapter 17. Sequential Logic Network Design; Chapter 18. Design for Testability; Back cover.
520 $aPreface Design Process and Technology Theory of logic design Analysis and synthesis Implementation technologies Predictable technologies Contemporary CAD of logic networks Number Systems Positional numbers Counting in a positional number system Basic arithmetic operations in various number systems Binary arithmetic Radix-complement representations Techniques for conversion of numbers in various radices Overflow Residue arithmetic Other binary codes Redundancy and reliability Graphical Data Structures Graphs in discrete devices and systems design Basic definitions T.
504 $aIncludes bibliographical references and index.
650 0 $aLogic devices$xDesign and construction.
650 0 $aLogic design.
650 6 $aStructure logique.
650 7 $aTECHNOLOGY & ENGINEERING$xMechanical.$2bisacsh
650 7 $aLogic design.$2fast$0(OCoLC)fst01002045
655 0 $aElectronic books.
655 4 $aElectronic books.
700 1 $aShmerko, Vlad P.
776 08 $iPrint version:$aYanushkevich, Svetlana N.$tIntroduction to Logic Design.$dHoboken : CRC Press, ©2008$z9781420060942
856 40 $uhttp://www.columbia.edu/cgi-bin/cul/resolve?clio14697767$zTaylor & Francis eBooks
852 8 $blweb$hEBOOKS