| Record ID | marc_columbia/Columbia-extract-20221130-007.mrc:415918910:4157 |
| Source | marc_columbia |
| Download Link | /show-records/marc_columbia/Columbia-extract-20221130-007.mrc:415918910:4157?format=raw |
LEADER: 04157mam a22004214a 4500
001 3404136
005 20221020065237.0
008 020918t20022002maua b 001 0 eng
010 $a 2002034356
015 $aGBA2-V0298
020 $a1402072449 (HB : alk. paper)
035 $a(OCoLC)ocm50614458
035 $9AVK2465CU
035 $a(NNC)3404136
035 $a3404136
040 $aDLC$cDLC$dUKM$dC#P$dOHX$dOrLoB-B
042 $apcc
050 00 $aTK7887.6$b.W34 2002
072 7 $aTK$2lcco
082 00 $a621.39/814$221
100 1 $aWaltari, Mikko E.$0http://id.loc.gov/authorities/names/n2002161186
245 10 $aCircuit techniques for low-voltage and high-speed A/D converters /$cby Mikko E. Waltari and Kari A.I. Halonen.
260 $aBoston :$bKluwer Academic Publishers,$c[2002], ©2002.
300 $avii, 254 pages :$billustrations ;$c25 cm.
336 $atext$btxt$2rdacontent
337 $aunmediated$bn$2rdamedia
490 1 $aKluwer international series in engineering and computer science. Analog circuits and signal processing
504 $aIncludes bibliographical references (p. 239-254) and index.
505 00 $g1.$tIntroduction -- $g2.$tLow Voltage Issues -- $g1.$tSignal-to-Noise Ratio -- $g2.$tCircuit Speed -- $g3.$tPower Consumption -- $g4.$tMatching -- $g5.$tOperational Amplifiers -- $g6.$tMOS Switches -- $g7.$tConclusions -- $g3.$tSample-and-Hold Operation -- $g1.$tS/H Basics and Performance Metrics -- $g2.$tSpectra of Sampled Signals -- $g3.$tNoise Issues in S/H Circuits -- $g4.$tBasic S/H Circuit Architectures -- $g4.$tA/D Converters -- $g1.$tA/D Conversion -- $g2.$tFlash ADC -- $g3.$tSubranging ADC -- $g4.$tFolding-and-Interpolating ADC -- $g5.$tPipelined ADC -- $g6.$tTime-Interleaved ADC -- $g7.$tA/D Converters: Summary -- $g5.$tS/H Circuit Architectures -- $g1.$tBipolar Architectures -- $g2.$tCMOS Architectures -- $g6.$tSampling with a MOS Transistor Switch -- $g1.$tVoltage-Dependent Turn-Off Moment -- $g2.$tCharge Injection -- $g3.$tBottom Plate Sampling -- $g4.$tNonlinear Time Constant -- $g5.$tSampling Function -- $g7.$tOperational Amplifiers -- $g1.$tRequirements for SC Applications --
505 80 $g2.$tOTAs with Single High-Gain Stage -- $g3.$tTwo-Stage Opamps -- $g8.$tClock Generation -- $g1.$tJitter -- $g2.$tSignal Crosstalk -- $g3.$tCircuits -- $g9.$tDouble-Sampling -- $g1.$tPrinciple -- $g2.$tNonidealities -- $g3.$tSkew-Insensitive Circuit -- $g10.$tSwitched Opamp Technique -- $g1.$tOperation Principle -- $g2.$tCompensating for Common Mode Voltage Step -- $g3.$tPreventing Charge Leakage from Virtual Ground -- $g4.$tSpeed -- $g5.$tPower Supply Rejection and Noise -- $g6.$tSwitchable Opamps -- $g7.$tInput Interfaces for SO Circuits -- $g11.$tOther Low-Voltage Techniques -- $g1.$tLow Voltage SC Technique with Unity-Gain-Reset Opamps -- $g2.$tCurrent Sources and Mirrors -- $g3.$tBandgap References -- $g12.$tPrototypes and Experimental Results -- $g1.$tMeasurement Setups and Methods -- $g2.$tS/H Circuit Using Double-Sampling -- $g3.$tTiming Skew-Insensitive Double-Sampling S/H -- $g4.$t10-Bit, 200-MS/s Parallel Pipeline ADC -- $g5.$t13-Bit Self-Calibrated IF-Sampling Pipelined ADC --
505 80 $g6.$tDeglitcher for Current Steering DACs -- $g7.$t1st Switched Opamp Pipelined ADC -- $g8.$t2nd Switched Opamp Pipelined ADC -- $g13.$tConclusions -- $gApp.$tDerivation of OTA GBW Requirement -- $gApp.$tOptimum Input Capacitance -- $gApp.$tSaturation Voltage.
650 0 $aAnalog-to-digital converters.$0http://id.loc.gov/authorities/subjects/sh85004773
650 0 $aLow voltage systems.$0http://id.loc.gov/authorities/subjects/sh94006157
650 0 $aElectronic circuits.$0http://id.loc.gov/authorities/subjects/sh85042279
700 1 $aHalonen, K. A. I.$q(Kari A. I.)$0http://id.loc.gov/authorities/names/no00075758
830 0 $aKluwer international series in engineering and computer science ;$vSECS 709.$0http://id.loc.gov/authorities/names/n84749953
830 0 $aKluwer international series in engineering and computer science.$pAnalog circuits and signal processing.$0http://id.loc.gov/authorities/names/n92072416
852 00 $boff,eng$hTK7887.6$i.W34 2002