MARC record from Internet Archive

LEADER: 06528cam 2200829 a 4500
001 ocm10208190
003 OCoLC
005 20210214212740.0
008 831118s1984 njua b 001 0 eng
010 $a 83024734
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019 $a12455200$a1078997769$a1082473268$a1090478874$a1201841922$a1201864568
020 $a0132123339
020 $a9780132123334
020 $a0132123258
020 $a9780132123259
035 $a(OCoLC)10208190$z(OCoLC)12455200$z(OCoLC)1078997769$z(OCoLC)1082473268$z(OCoLC)1090478874$z(OCoLC)1201841922$z(OCoLC)1201864568
037 $a103783$bTVG
050 00 $aTK7888.3$b.M343 1984
080 0 $a689.5
082 00 $a621.3815/37$219
084 $aST 195$2rvk
084 $aZN 5620$2rvk
084 $aPM 73$2blsrissc
100 1 $aMano, M. Morris,$d1927-
245 10 $aDigital design /$cM. Morris Mano.
260 $aEnglewood Cliffs, N.J. :$bPrentice-Hall,$c©1984.
300 $axi, 492 pages :$billustrations ;$c24 cm
336 $atext$btxt$2rdacontent
337 $aunmediated$bn$2rdamedia
338 $avolume$bnc$2rdacarrier
490 1 $aPrentice-Hall international editions.
500 $aChapters 1-7 and 10 originally published as part of the author's Digital logic and computer design, ©1979.
504 $aIncludes bibliographical references and index.
520 $aThis introduction to digital design presents the basic tools for the design of digital circuits, and provides procedures suitable for a variety of digital design applications.
583 1 $aLegacy$c2018$5UoY
505 00 $tBinary Systems --$tDigital Computers and Digital Systems --$tBinary Numbers --$tNumber Base Conversions --$tOctal and Hexadecimal Numbers --$tComplements --$tSigned Binary Numbers --$tBinary Codes --$tBinary Storage and Registers --$tBinary Logic --$tBoolean Algebra and Logic Gates --$tBasic Definitions --$tAxiomatic Definition of Boolean Algebra --$tBasic Theorems and Properties of Boolean Algebra --$tBoolean Functions --$tCanonical and Standard Forms --$tOther Logic Operations --$tDigital Logic Gates --$tIntegrated Circuits --$tSimplification of Boolean Functions --$tThe Map Method --$tTwo- and Three-Variable Maps --$tFour-Variable Map --$tFive-Variable Map --$tProduct of Sums Simplification --$tNAND and NOR Implementation --$tOther Two-Level Implementations --$tDon't-Care Conditions --$tThe Tabulation Method --$tDetermination of Prime Implicants --$tSelection of Prime Implicants --$tCombinational Logic --$tDesign Procedure --$tAdders --$tSubtractors --$tCode Conversion --$tAnalysis Procedure --$tMultilevel NAND Circuits --$tMultilevel NOR Circuits --$tExclusive-OR Functions --$tMSI and PLD Components --$tBinary Adder and Subtractor --$tDecimal Adder --$tMagnitude Comparator --$tDecoders and Encoders --$tMultiplexers --$tRead-Only Memory (ROM) --$tProgrammable Logic Array (PLA) --$tProgrammable Array Logic (PAL) --$tSynchronous Sequential Logic --$tFlip-Flops --$tTriggering of Flip-Flops --$tAnalysis of Clocked Sequential Circuits --$tState Reduction and Assignment --$tFlip-Flop Excitation Tables --$tDesign Procedure --$tDesign of Counters.
505 80 $tRegisters, Counters, and the Memory Unit --$tRegisters --$tShift Registers --$tRipple Counters --$tSynchronous Counters --$tTiming Sequences --$tRandom-Access Memory (RAM) --$tMemory Decoding --$tError-Correcting Codes --$tAlgorithmic State Machines (ASM) --$tASM Chart --$tTiming Considerations --$tControl Implementation --$tDesign with Multiplexers --$tPLA Control --$tAsynchronous Sequential Logic --$tAnalysis Procedure --$tCircuits with Latches --$tDesign Procedure --$tReduction of State and Flow Tables --$tRace-Free State Assignment --$tHazards --$tDesign Example --$tDigital Integrated Circuits --$tSpecial Characteristics --$tBipolar-Transistor Characteristics --$tRTL and DTL Circuits --$tTransistor-Transistor Logic (TTL) --$tEmmitter-Coupled Logic (ECL) --$tMetal-Oxide Semiconductor (MOS) --$tComplementary MOS (CMOS) --$tCMOS Transmission Gate Circuits --$tLaboratory Experiments --$tIntroduction to Experiments --$tBinary and Decimal Numbers --$tDigital Logic Gates --$tSimplification of Boolean Functions --$tCombinational Circuits --$tCode Converters --$tDesign with Multiplexers --$tAdders and Subtractors --$tFlip-Flops --$tSequential Circuits --$tCounters --$tShift Registers --$tSerial Addition --$tMemory Unit --$tLamp Handball --$tClock-Pulse Generator --$tParallel Adder --$tBinary Multiplier --$tAsynchronous Sequential Circuits --$tStandard Graphic Symbols --$tRectangular-Shape Symbols --$tQualifying Symbols --$tDependency Notation --$tSymbols for Combinational Elements --$tSymbols for Flip-Flops --$tSymbols for Registers --$tSymbols for Counters.
650 0 $aElectronic digital computers$xCircuits.
650 0 $aLogic circuits.
650 0 $aLogic design.
650 0 $aDigital integrated circuits.
650 6 $aOrdinateurs$xCircuits.
650 6 $aCircuits logiques.
650 6 $aStructure logique.
650 6 $aCircuits intégrés numériques.
650 7 $aDigital integrated circuits.$2fast$0(OCoLC)fst00893692
650 7 $aElectronic digital computers$xCircuits.$2fast$0(OCoLC)fst00907124
650 7 $aLogic circuits.$2fast$0(OCoLC)fst01002031
650 7 $aLogic design.$2fast$0(OCoLC)fst01002045
650 7 $aComputer$2gnd
650 7 $aDigitalschaltung$2gnd
650 7 $aLogische Schaltung$2gnd
653 $aDigital computers$aLogic circuits
700 1 $aMano, M. Morris,$d1927-$tDigital logic and computer design.
776 08 $iOnline version:$aMano, M. Morris, 1927-$tDigital design.$dEnglewood Cliffs, N.J. : Prentice-Hall, ©1984$w(OCoLC)566184278
830 0 $aPrentice-Hall international editions.
856 41 $3Table of contents$uhttp://www.gbv.de/dms/bowker/toc/9780132123334.pdf
938 $aBaker and Taylor$bBTCP$nBK0006841643
938 $aYBP Library Services$bYANK$n66902
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948 $hHELD BY P4A - 319 OTHER HOLDINGS