| Record ID | ia:architecturedesi0000unse_f4m6 |
| Source | Internet Archive |
| Download MARC XML | https://archive.org/download/architecturedesi0000unse_f4m6/architecturedesi0000unse_f4m6_marc.xml |
| Download MARC binary | https://www.archive.org/download/architecturedesi0000unse_f4m6/architecturedesi0000unse_f4m6_meta.mrc |
LEADER: 00736cam a2200229 a 4500
001 99056374
003 DLC
005 20000606071827.0
008 991027s2000 gw a b 000 0 eng
010 $a 99056374
020 $a354064976X
040 $aDLC$cDLC$dDLC
042 $apcc
050 00 $aQA76.9.A73$bA734 2000
082 00 $a004.2/2$221
245 00 $aArchitecture design and validation methods /$cEgon Börger (ed.).
260 $aBerlin ;$aNew York :$bSpringer,$cc2000.
300 $aviii, 357 p. :$bill. ;$c24 cm.
504 $aIncludes bibliographical references.
650 0 $aComputer architecture.
650 0 $aIntegrated circuits$xVery large scale integration$xDesign and construction.
700 1 $aBörger, E.$q(Egon),$d1946-