This thesis describes a systematic design procedure for millimetre-wave voltage controlled oscillators (VCOs) based on a comprehensive investigation of SiGe HBT VCOs. In unison with the design procedure, 13 differential Colpitts test circuits were implemented in a 0.18 mum SiGe HBT BiCMOS process which resulted in some of the lowest phase noise and widest tuning integrated VCOs reported to date. VCOs at 35 GHz and 60 GHz had measured phase noise of -112.7 dBc/Hz and -104 dBc/Hz at 1-MHz offset, respectively. Major contributions include a validated design procedure based on original analytical phase noise derivations that account for noise correlation, design techniques for optimizing accumulation-mode nMOS varactors, and a novel push-push VCO architecture. Although this design procedure is specific to the Colpitts topology, it shares general design techniques that are applicable to all types of VCO architectures.