MARC Record from Library of Congress

LEADER: 04263cam a22003134a 4500
001 2001020410
003 DLC
005 20080310124158.0
008 010212s2001 maua b 101 0 eng
010 $a 2001020410
020 $a0792373456 (alk. paper)
040 $aDLC$cDLC$dDLC
042 $apcc
050 00 $aQA76.9.D5$bI3475 2001
082 00 $a004/.36$221
111 2 $aIFIP WG10.3/WG10.4/WG10.5 International Workshop on Distributed and Parallel Embedded Systems$d(2000 :$cSchloss Eringerfeld, Germany)
245 10 $aArchitecture and design of distributed embedded systems :$bIFIP WG10.3/WG10.4/WG10.5 International Workshop on Distributed and Parallel Embedded Systems (DIPES 2000), October 18-19, 2000, Schloss Eringerfeld, Germany /$cedited by Bernd Kleinjohann.
260 $aBoston :$bKluwer Academic Publishers,$cc2001.
300 $aix, 236 p. :$bill. ;$c24 cm.
490 1 $aInternational Federation For Information Processing ;$v61
504 $aIncludes bibliographical references and index.
505 8 $aMachine generated contents note: Session 1: Methodology I A Methodology for Complex Embedded Systems Design: -- Petri Nets within a UML Approach -- R. J. Machado, J. M. Fernandes, H. D. Santos -- Efficient System Modeling for Complex Real-Time Industrial Networks -- using the ACCORD/UML Methodology -- S. Gerard, N. S. Voros, C. Koulamas, F. Terrier -- Analog/Digital Co-Design -- F. Heuschen, K. Waldschmidt -- A Design Methodology for Embedded Systems based on -- Multiple Processors -- L. Carro, F. Wagner, M Kreutz, M. Oyamada Session 2: Architecture An Architecture for Reliable Distributed Computer-Controlled Systems -- L. M. Pinho, F. Vasques -- Generic Architecture Platform for Multiprocessor System-On-Chip Design -- A. Baghdadi, N-E. Zergainoh, D. Lyonnard, A. A. Jerraya -- JPURE - A Purified Java Execution Environment for Controller Networks -- D. Beuche, L. Buttner, D. Mahrenholz, W. Schroder-Preikschat, -- F. Schon -- Optimizing Functional distribution in Complex System Design -- O. P. Dias, I. M Teixeira, J P. Teixeira, L. B. Becker, C. E. Pereira Session 3: Design Environments Customizing Software Toolkits for Embedded Systems-On-Chip -- A. Halambi, N. Dutt, A. Nicolau -- Framework for System Design, Validation and Fast Prototyping of -- Multiprocessor System-On-Chip -- N. E. Zergainoh, A. Baghdadi, L. Tambour, D. Lyonnard, L. Gauthier, -- A. Jerraya -- The Specification Language SpecC within the PARADISE Design -- Environment -- A. Rettberg, F. J. Rammig, A. Gerstlauer, D. D. Gajski, W. Hardt, -- B. Kleinjohann -- vi Session 4: Methodology II Real-Time Support for Online Controller Supervision and Optimisation -- M. Deppe, O. Oberschelp -- A Product Family Approach to Graceful Degradation -- W. Nace, P. Koopman -- Environment Modelling in Closed Specifications of Embedded Systems -- M. Katara, A. Luoma Session 5: Test and Validation Test Case Design for the Validation of Component-Based Embedded -- Systems -- W. Fleisch -- Timing Constraints Validation using UPPAAL: Schedulability Analysis -- H. Sun Session 6: Distribution and Communication A New Dynamic Scheduling Algorithm for Real-Time Multiprocessor -- Systems -- Y. Qiao, H. Wang, G. Dai -- Deriving Message Passing Protocols from Collective Behavior -- P. Kellomaki -- Java Real-Time Publish-Subscribe Middleware for Distributed Embedded -- Systems -- D. Kim, Y. Doh, Y.-H. Lee Session 7: Synthesis A Verified Hardware Synthesis of Esterel Programs -- K. Schneider -- EXPLORA - Generic Design Space Exploration during Embedded System -- Synthesis -- F. Cieslok, H. Esau, J. Teich -- Automatic Code Generation for Multirate Simulink Models with Support -- for the OSEK Real-Time Operating System -- C. Homburg, U. Kiffmeier, L. Kosters.
650 0 $aElectronic data processing$xDistributed processing$vCongresses.
650 0 $aParallel processing (Electronic computers)$vCongresses.
650 0 $aEmbedded computer systems$vCongresses.
700 1 $aKleinjohann, Bernd.
830 0 $aInternational Federation for Information Processing (Series) ;$v61.
856 4 $3Table of Contents$uhttp://www.loc.gov/catdir/toc/fy02/2001020410.html
856 42 $3Publisher description$uhttp://www.loc.gov/catdir/enhancements/fy0820/2001020410-d.html