{"publishers": ["Kluwer Academic Publishers"], "pagination": "p. cm.", "lc_classifications": ["TK7895.E42 S97 2003"], "last_modified": {"type": "/type/datetime", "value": "2008-04-01 03:28:50.625462"}, "title": "System level design model with re-use of system IP", "dewey_decimal_class": ["004.6"], "type": {"key": "/type/edition"}, "id": 5209330, "languages": [{"key": "/l/eng"}], "lccn": ["2003061861"], "isbn_10": ["1402075944"], "publish_date": "2003", "publish_country": "mau", "key": "/b/OL3691258M", "by_statement": "edited by Patrizia Cavalloro ... [et al.].", "publish_places": ["Boston"], "contributions": ["Cavalloro, Patrizia."], "subjects": ["Systems on a chip -- Design and construction.", "Modularity (Engineering)", "System design."], "revision": 1}